SN65LVDS34 具有 -4 至 5V 共模范围的双路 LVDS 接收器
This family of four LVDS data line receivers offers the widest common-mode input voltage range in the industry. These receivers provide an input voltage range specification compatible with a 5-V PECL signal as well as an overall increased ground-noise tolerance. They are in industry standard footprints with integrated termination as an option.
Precise control of the differential input voltage thresholds allows for inclusion of 50 mV of input voltage hysteresis to improve noise rejection on slowly changing input signals. The input thresholds are still no more than ±50 mV over the full input common-mode voltage range.
The high-speed switching of LVDS signals usually necessitates the use of a line impedance matching resistor at the receiving-end of the cable or transmission media
| SN65LVDS34 | SN65LVDS9637 | SN65LVDS9638 | |
| Input Signal | CMOS, ECL, LVCMOS, LVDS, LVECL, LVPECL, PECL | LVDS | LVTTL |
| Output Signal | LVTTL | LVTTL | LVDS |
| No. of Rx | 2 | 2 | |
| No. of Tx | 2 | ||
| Signaling Rate(Mbps) | 400 | 150 | 150 |
| Supply Voltage(s)(V) | 3.3 | 3.3 | 3.3 |
| ICC(Max)(mA) | 12 | 10 | 13 |
| Rx tpd(Typ)(ns) | 4 | 2.1 | |
| Tx tpd(Typ)(ns) | 1.7 | ||
| Part-to-Part Skew(Max)(ps) | 1000 | 1000 | 800 |
| Pin/Package | 8SOIC | 8MSOP, 8MSOP-PowerPAD, 8SOIC | 8MSOP, 8MSOP-PowerPAD, 8SOIC |
| Operating Temperature Range(°C) | -40 to 85 | -40 to 85 | -40 to 85 |
| ESD HBM(kV) | 15 | 8 | 8 |
| Approx. Price (US$) | 0.85 | 1ku | 0.80 | 1ku | 0.80 | 1ku |
SN65LVDS34 特性
- 400-Mbps Signaling Rate1 and 200-Mxfr/s Data Transfer Rate
- Operates With a Single 3.3-V Supply
- –4-V to 5-V Common-Mode Input Voltage Range
- Differential Input Thresholds <±50 mV With 50 mV of Hysteresis Over Entire Common-Mode Input Voltage Range
- Integrated 110-
Line Termination Resistors On LVDT Products
- TSSOP Packaging (33 Only)
- Complies With TIA/EIA-644 (LVDS)
- Active Failsafe Assures a High-Level Output With No Input
- Bus-Pin ESD Protection Exceeds 15 kV HBM
- Input Remains High-Impedance on Power Down
- TTL Inputs Are 5-V Tolerant
- Pin-Compatible With the AM26LS32, SN65LVDS32B, µA9637, SN65LVDS9637B
SN65LVDS34 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN65LVDS34D | ACTIVE | -40 to 85 | 1.05 | 1ku | SOIC (D) | 8 | 75 | TUBE | |
| SN65LVDS34DG4 | ACTIVE | -40 to 85 | 1.05 | 1ku | SOIC (D) | 8 | 75 | TUBE | |
| SN65LVDS34DR | ACTIVE | -40 to 85 | 0.85 | 1ku | SOIC (D) | 8 | 2500 | LARGE T&R | |
| SN65LVDS34DRG4 | ACTIVE | -40 to 85 | 0.85 | 1ku | SOIC (D) | 8 | 2500 | LARGE T&R |
SN65LVDS34 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN65LVDS34D | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN65LVDS34D | SN65LVDS34D |
| SN65LVDS34DG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN65LVDS34DG4 | SN65LVDS34DG4 |
| SN65LVDS34DR | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN65LVDS34DR | SN65LVDS34DR |
| SN65LVDS34DRG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN65LVDS34DRG4 | SN65LVDS34DRG4 |
SN65LVDS34 应用技术支持与电子电路设计开发资源下载
- SN65LVDS34 数据资料 dataSheet 下载.PDF
- TI 德州仪器LVDS PHYs选型与价格 . xls
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- 使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)
- 1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)
- 接口选择指南 (Rev. D) (PDF 2994 KB)
- Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)
- Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
- Isolated RS-485 Reference Design (PDF 80 KB)
- 无铅组件涂层的保存期评估 (PDF 1305 KB)
- Analog Signal Chain Guide (8.62 MB)
- Industrial Interface IC Solutions (101 KB)
