SN75LVDS389 八位 LVDS 发送器
The intended application of this device and signaling technique is for point-to-point and multidrop baseband data transmission over controlled impedance media of approximately 100
SN75LVDS389
Input Signal
LVTTL
Output Signal
LVDS
No. of Rx
8
Signaling Rate(Mbps)
630
Supply Voltage(s)(V)
3.3
ICC(Max)(mA)
70
Rx tpd(Typ)(ns)
1.7
Part-to-Part Skew(Max)(ps)
1500
Pin/Package
38TSSOP
Operating Temperature Range(�C)
0 to 70
ESD HBM(kV)
4
Approx. Price (US$)
2.00 | 1ku
SN75LVDS389 特性
Four ('391), Eight ('389) or Sixteen ('387) Line Drivers Meet or Exceed the Requirements of ANSI EIA/ TIA-644 Standard
Designed for Signaling Rates Low-Voltage Differential Signaling With Typical Output Voltage of 350 mV and a 100- Propagation Delay Times Less Than 2.9 ns
Output Skew Is Less Than 150 ps
Part-to-Part Skew Is Less Than 1.5 ns
35-mW Total Power Dissipation in Each Driver Operating at 200 MHz
Driver Is High Impedance When Disabled or With VCC < 1.5 V
SN65' Version Bus-Pin ESD Protection Exceeds 15 kV
Packaged in Thin Shrink Small-Outline Package With 20-mil Terminal Pitch
Low-Voltage TTL (LVTTL) Logic Inputs Are 5-V Tolerant
SN75LVDS389 芯片订购指南
器件
状态
温度
价格
封装 | 引脚
封装数量 | 封装载体
丝印标记
SN75LVDS389DBT
ACTIVE
0 to 70
2.40 | 1ku
TSSOP (DBT) | 38 50 | TUBE
SN75LVDS389DBTG4
ACTIVE
0 to 70
2.40 | 1ku
TSSOP (DBT) | 38 50 | TUBE
SN75LVDS389DBTR
ACTIVE
0 to 70
2.00 | 1ku
TSSOP (DBT) | 38 2000 | LARGE T&R
SN75LVDS389DBTRG4
ACTIVE
0 to 70
2.00 | 1ku
TSSOP (DBT) | 38 2000 | LARGE T&R
SN75LVDS389 质量与无铅数据
器件
环保计划*
铅/焊球涂层
MSL 等级/回流焊峰
环保信息与无铅 (Pb-free)
DPPM / MTBF / FIT 率
SN75LVDS389DBT
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
SN75LVDS389DBT
SN75LVDS389DBT
SN75LVDS389DBTG4
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
SN75LVDS389DBTG4 SN75LVDS389DBTG4
SN75LVDS389DBTR
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
SN75LVDS389DBTR
SN75LVDS389DBTR
SN75LVDS389DBTRG4
Green (RoHS & no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
SN75LVDS389DBTRG4 SN75LVDS389DBTRG4
SN75LVDS389 应用技术支持与电子电路设计开发资源下载
SN75LVDS389 数据资料 dataSheet 下载 .PDF TI 德州仪器LVDS PHYs选型与价格 . xls 所选封装材料的热学和电学性质 (PDF 645 KB)使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)接口选择指南 (Rev. D) (PDF 2994 KB)Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)Isolated RS-485 Reference Design (PDF 80 KB)无铅组件涂层的保存期评估 (PDF 1305 KB)Analog Signal Chain Guide (8.62 MB)Industrial Interface IC Solutions (101 KB)
This family of four, eight, and sixteen differential line drivers implements the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the sixteen current-mode drivers will deliver a minimum differential output voltage magnitude of 247 mV into a 100-
load when enabled. 
up to 630 Mbps With Very Low Radiation (EMI)
