TL16C450 没有 FIFO 的单路 UART
The TL16C450 is a CMOS version of an asynchronous communications element (ACE). It typically functions in a microcomputer system as a serial input/output interface.
The TL16C450 performs serial-to-parallel conversion on data received from a peripheral device or modem and parallel-to-serial conversion on data received from its CPU. The CPU can read and report on the status of the ACE at any point in the ACE's operation. Reported status information includes the type of transfer operation in progress, the status of the operation, and any error conditions encountered.
The TL16C450 ACE includes a programmable, on-board, baud rate generator. This generator is capable of dividing a reference clock input by divisors from 1 to (216 -1) and producing a 16× clock for driving the internal transmitter logic
|
TL16C450 |
| Number of Channels |
1 |
| FIFOs(bytes) |
0 |
| Operating Voltage(V) |
5 |
| Pin/Package |
44PLCC |
| Rating |
Catalog |
| Tx / Rx FIFO INT Trig |
No / No |
| Auto RTS/CTS |
No |
| CPU Interface |
X86 |
| Baud Rate (max) at Vcc = 5.0V and with 16X Sampling(Mbps) |
0.256 |
TL16C450 特性
- Programmable Baud Rate Generator Allows Division of Any Input Reference Clock by 1 to (216 -1) and Generates an Internal 16× Clock
- Full Double Buffering Eliminates the Need for Precise Synchronization
- Standard Asynchronous Communication Bits (Start, Stop, and Parity) Added or Deleted to or From the Serial Data Stream
- Independent Receiver Clock Input
- Transmit, Receive, Line Status, and Data Set Interrupts Independently Controlled
- Fully Programmable Serial Interface Characteristics:
- 5-, 6-, 7-, or 8-Bit Characters
- Even-, Odd-, or No-Parity Bit Generation and Detection
- 1-, 1 1/2-, or 2-Stop Bit Generation
- Baud Generation (dc to 256 Kbit/s)
- False Start Bit Detection
- Complete Status Reporting Capabilities
- 3-State TTL Drive Capabilities for Bidirectional Data Bus and Control Bus
- Line Break Generation and Detection
- Internal Diagnostic Capabilities:
- Loopback Controls for Communications Link Fault Isolation
- Break, Parity, Overrun, Framing Error Simulation
- Fully Prioritized Interrupt System Controls
- Modem Control Functions (CTS\, RTS\, DSR\, DTR\, RI\, and DCD\)
- Easily Interfaces to Most Popular
TL16C450 芯片订购指南
TL16C450 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| TL16C450FN |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-3-260C-168 HR |
TL16C450FN |
TL16C450FN |
| TL16C450FNG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-3-260C-168 HR |
TL16C450FNG4 |
TL16C450FNG4 |
| TL16C450FNR |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-3-260C-168 HR |
TL16C450FNR |
TL16C450FNR |
| TL16C450FNRG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-3-260C-168 HR |
TL16C450FNRG4 |
TL16C450FNRG4 |
TL16C450 应用技术支持与电子电路设计开发资源下载
- TL16C450 数据资料 dataSheet 下载.PDF
- TI 德州仪器UART选型与价格 . xls
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- 使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)
- 高性能SERDES及其在CPRI 接口的应用分析 (zhca076.HTM, 8 KB)
- 1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)
- 接口选择指南 (Rev. D) (PDF 2994 KB)
- Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)
- Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
- Isolated RS-485 Reference Design (PDF 80 KB)
- 无铅组件涂层的保存期评估 (PDF 1305 KB)
- Analog Signal Chain Guide (8.62 MB)
- Industrial Interface IC Solutions (101 KB)
TL16C450 工具和软件
