TL16PC564B 具有 64 字节 FIFO、PCMCIA 接口的单路 UART
The TL16PC564B/BLV is designed to provide all the functions necessary for a Personal Computer Memory Card International Association (PCMCIA) universal asynchronous receiver transmitter (UART) subsystem interface. This interface provides a serial-to-parallel conversion for data to and from a modem coder-decoder/digital signal processor (CODEC/DSP) function to a PCMCIA parallel data-port format. A computer central processing unit (CPU), through a PCMCIA host controller, can read the status of the asynchronous communications element (ACE) interface at any point in the operation. Reported status information includes the type of transfer operation in process, the status of the operation, and any error conditions encountered.
|
TL16PC564B |
| Number of Channels |
1 |
| FIFOs(bytes) |
64 |
| Operating Voltage(V) |
3.3,5 |
| Operating Temperature Range(C) |
0 to 70 |
| Pin/Package |
100LQFP |
| Rating |
Catalog |
| Tx / Rx FIFO INT Trig |
No / 4 Levels |
| Auto RTS/CTS |
Yes |
| CPU Interface |
PCMCIA |
| Baud Rate (max) at Vcc = 3.3V and with 16X Sampling(Mbps) |
1.0 |
| Baud Rate (max) at Vcc = 5.0V and with 16X Sampling(Mbps) |
1.0 |
TL16PC564B 特性
- Integrated Asynchronous Communications Element (ACE) Compatible With PCMCIA PC Card Standard Release 2.01
- Consists of a Single TL16C550 ACE Plus PCMCIA Interface Logic
- Provides Common I-Bus/Z-Bus Microcontroller Inputs for Most Intel™ and Zilog™ Subsystems
- Fully Programmable 256-Byte Card Information Structure (CIS) and 8-Byte Card Configuration Register (CCR)
- Adds or Deletes Standard Asynchronous Communication Bits (Start, Stop and Parity) to or From Serial Data Stream
- Independently Controlled Transmit, Receive, Line Status, and Data Set Interrupts
- Subsystem Selectable Serial-Bypass Mode Provides Subsystem With Direct Parallel Access to the FIFOs
- Fully Programmable Serial-Interface Characteristics:
- 5-, 6-, 7-, or 8-Bit Characters
- Even-, Odd-, or No-Parity Bit Generation and Detection
- 1-, 1 1/2-, or 2-Stop Bit Generation
- Baud-Rate Generation
- Fully Prioritized Interrupt System Controls
- Modem Control Functions
- Provides TL16C450 Mode at Reset Plus Selectable Normal TL16C550 Operation or Extended 64-Byte FIFO Mode
- Selectable Auto-RTS\ Mode Deactivates RTS\ at 14 Bytes in 550 Mode and at 56 Bytes in Extended 550 Mode
- Selectable Auto-CTS\ Mode Deactivates Serial Transfers When CTS\ is Inactive
- Available in 100 Pin Thin Quad Flatpack (PZ) Package or 100-Ball (GGM) MicroStar BGA™ Package
TL16PC564B 芯片订购指南
| 器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| TL16PC564BPZ |
ACTIVE |
0 to 70 |
7.35 | 1ku |
LQFP (PZ) | 100 |
90 | JEDEC TRAY (10+1) |
|
| TL16PC564BPZG4 |
ACTIVE |
0 to 70 |
7.35 | 1ku |
LQFP (PZ) | 100 |
90 | JEDEC TRAY (10+1) |
|
TL16PC564B 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| TL16PC564BPZ |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-3-260C-168 HR |
TL16PC564BPZ |
TL16PC564BPZ |
| TL16PC564BPZG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-3-260C-168 HR |
TL16PC564BPZG4 |
TL16PC564BPZG4 |
TL16PC564B 应用技术支持与电子电路设计开发资源下载
- TL16PC564B 数据资料 dataSheet 下载.PDF
- TI 德州仪器UART选型与价格 . xls
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- 使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)
- 高性能SERDES及其在CPRI 接口的应用分析 (zhca076.HTM, 8 KB)
- 1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)
- 接口选择指南 (Rev. D) (PDF 2994 KB)
- Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)
- Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
- Isolated RS-485 Reference Design (PDF 80 KB)
- 无铅组件涂层的保存期评估 (PDF 1305 KB)
- Analog Signal Chain Guide (8.62 MB)
- Industrial Interface IC Solutions (101 KB)
TL16PC564B 工具和软件
