TL28L92 3.3V/5V 双路通用异步接收器/发送器
The TL28L92 is a pin and function replacement for the SC26C92 operating at 3.3 V or 5 V supply with added features and deeper FIFOs. Its configuration on power-up is that of the SC26C92. Its differences from the SC26C92 are: 16 character receiver, 16 character transmit FIFOs, watchdog timer for each receiver, mode register 0 is added, extended baud rate and overall faster speeds, programmable receiver and transmitter interrupts.
Pin programming will allow the device to operate with either the Motorola or Intel bus interface. The bit 3 of the MR0A register allows the device to operate in an 8 byte FIFO mode if strict compliance with the SC26C92 FIFO structure is required.
The Texas Instruments TL28L92 Dual Universal Asynchronous Receiver/Transmitter (DUART) is a single-chip CMOS-LSI communications device that provides two full-duplex asynchronous receiver/transmitter channels in a single package
|
TL28L92 |
| Number of Channels |
2 |
| FIFOs(bytes) |
16 |
| Operating Voltage(V) |
3.3,5 |
| Operating Temperature Range(C) |
-40 to 85,0 to 70 |
| Pin/Package |
44QFP |
| Rating |
Catalog |
| Tx / Rx FIFO INT Trig |
Multi / Multi |
| Auto RTS/CTS |
Yes |
| CPU Interface |
X86 or 68K |
| Baud Rate (max) at Vcc = 1.8V and with 16X Sampling(Mbps) |
N/A |
| Baud Rate (max) at Vcc = 2.5V and with 16X Sampling(Mbps) |
N/A |
| Baud Rate (max) at Vcc = 3.3V and with 16X Sampling(Mbps) |
1.0 |
| Baud Rate (max) at Vcc = 5.0V and with 16X Sampling(Mbps) |
1.0 |
TL28L92 特性
- SC28L92 Pin Compatible
- 3.3 V to 5.0 V, –40°C to 85°C and 68xxx or
80xxx Bus Interface
- Dual Full-Duplex Independent Asynchronous
Receiver/Transmitters 16 Character FIFOs for
Each Receiver and Transmitter
- Pin Programming Selects 68xxx or 80xxx Bus
Interface
- Programmable Data Format
- 5 Data to 8 Data Bits Plus Parity
- Odd, Even, No Parity or Force Parity
- 1 Stop, 1.5 Stop or 2 Stop Bits
Programmable in 1/16-Bit Increments
- 16-Bit Programmable Counter/Timer
- Programmable Baud Rate for Each Receiver
and Transmitter Selectable From:
- 28 Fixed Rates: 50 Bd to 230.4 kBd
- Other Baud Rates to 1 MHz at 16×
- Programmable User-Defined Rates Derived
From a Programmable Counter/Timer
- External 1× or 16× Clock
- Parity, Framing, and Overrun Error Detection
- False Start Bit Detection
- Line Break Detection and Generation
- Programmable Channel Mode
- Normal (Full-Duplex)
- Automatic Echo
TL28L92 芯片订购指南
| 器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| TL28L92FR |
ACTIVE |
0 to 70 |
6.00 | 1ku |
QFP (FR) | 44 |
96 | JEDEC TRAY (10+1) |
|
| TL28L92FRR |
PREVIEW |
0 to 70 |
|
QFP (FR) | 44 |
|
|
| TL28L92IFR |
ACTIVE |
-40 to 85 |
6.20 | 1ku |
QFP (FR) | 44 |
96 | JEDEC TRAY (10+1) |
|
| TL28L92IFRR |
PREVIEW |
-40 to 85 |
|
QFP (FR) | 44 |
|
|
TL28L92 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| TL28L92FR |
TBD |
CU SN |
Level-3-220C-168 HR |
TL28L92FR |
TL28L92FR |
| TL28L92FRR |
|
|
|
TL28L92FRR |
TL28L92FRR |
| TL28L92IFR |
TBD |
CU SN |
Level-3-220C-168 HR |
TL28L92IFR |
TL28L92IFR |
| TL28L92IFRR |
|
|
|
TL28L92IFRR |
TL28L92IFRR |
TL28L92 应用技术支持与电子电路设计开发资源下载
- TL28L92 数据资料 dataSheet 下载.PDF
- TI 德州仪器UART选型与价格 . xls
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- 使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)
- 高性能SERDES及其在CPRI 接口的应用分析 (zhca076.HTM, 8 KB)
- 1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)
- 接口选择指南 (Rev. D) (PDF 2994 KB)
- Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)
- Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
- Isolated RS-485 Reference Design (PDF 80 KB)
- 无铅组件涂层的保存期评估 (PDF 1305 KB)
- Analog Signal Chain Guide (8.62 MB)
- Industrial Interface IC Solutions (101 KB)
TL28L92 工具和软件
