TLK1002A 二路信号调节收发器
TLK1002A is a single-chip dual signal conditioning transceiver.
This chip supports data rates from 1.0 Gbps up to 1.3 Gbps. An on-chip clock generation phase-locked loop (PLL) generates the required half-rate clock from an externally applied reference clock. This reference clock equals approximately one tenth of the data rate. It may be off frequency from both received data streams by up to ±200 ppm.
Both data paths are implemented identical. The implemented input buffers provide an input sensitivity of 400 mVp-p differential.
The data paths tolerate up to 0.606 UI total input jitter. Signal retiming is performed by means of phase-locked loop (PLL) circuits. The retimed output signals are fed to VML output buffers, which provide output amplitudes of typical 1600mVp-p differential across the external 2x50 
load
| TLK1002A | |
| Gbps per Serial Channel(Min) | 1 |
| Gbps per Serial Channel(Max) | 1.3 |
| ICC(Max)(mA) | 158 |
| IIH(Max)(uA) | 165 |
| IIL(Max)(uA) | -120 |
| Number of Serial Channels | 2 |
| Serial I/F | VML |
| Operating Temperature Range(C) | 0 to 70 |
| Pin/Package | 24VQFN |
| VCC(Min)(V) | 1.7 |
| VCC(Max)(V) | 1.9 |
| VCC(Nom)(V) | 1.8 |
| VIH(Min)(V) | 1.1 |
| VIH(Max)(V) | 2.7 |
| VIL(Max)(V) | 0.6 |
TLK1002A 特性
- Fully Integrated Signal Conditioning Transceiver
- 1.0-1.3 Gbps Operation
- Low Power CMOS Design (<300 mW)
- High Differential Output Voltage Swing (1600 mVp-p typical)
- 400 mVp-p Differential Input Sensitivity
- High Input Jitter Tolerance 0.606 UI
- Single 1.8 V Power Supply
- 2.5 V Tolerant Control Inputs
- Differential VML Transmit Outputs With No External Components Necessary
- No External Filter Components Required for PLLs
- Supports Loop-Back Modes
- Temperature Rating 0°C to 70°C
- Small Footprint 4 mm × 4 mm 24-Lead QFN Package
- APPLICATIONS
- Resynchronization in Both Directions for 1.25 Gbps Links
- Repeater for 1.0625 Gbps Applications
TLK1002A 芯片订购指南
| 器件 | 状态 | 温度 | 价格 | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| TLK1002ARGER | ACTIVE | 0 to 70 | 6.00 | 1ku | VQFN (RGE) | 24 | 3000 | LARGE T&R | |
| TLK1002ARGERG4 | ACTIVE | 0 to 70 | 6.00 | 1ku | VQFN (RGE) | 24 | 3000 | LARGE T&R | |
| TLK1002ARGET | ACTIVE | 0 to 70 | 6.90 | 1ku | VQFN (RGE) | 24 | 250 | SMALL T&R | |
| TLK1002ARGETG4 | ACTIVE | 0 to 70 | 6.90 | 1ku | VQFN (RGE) | 24 | 250 | SMALL T&R |
TLK1002A 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| TLK1002ARGER | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-2-260C-1 YEAR | TLK1002ARGER | TLK1002ARGER |
| TLK1002ARGERG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-2-260C-1 YEAR | TLK1002ARGERG4 | TLK1002ARGERG4 |
| TLK1002ARGET | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-2-260C-1 YEAR | TLK1002ARGET | TLK1002ARGET |
| TLK1002ARGETG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-2-260C-1 YEAR | TLK1002ARGETG4 | TLK1002ARGETG4 |
TLK1002A 应用技术支持与电子电路设计开发资源下载
- TLK1002A 数据资料 dataSheet 下载.PDF
- TI 德州仪器串行器和解串器选型与价格 . xls
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- 使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)
- 高性能SERDES及其在CPRI 接口的应用分析 (zhca076.HTM, 8 KB)
- 1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)
- 接口选择指南 (Rev. D) (PDF 2994 KB)
- Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)
- Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
- Isolated RS-485 Reference Design (PDF 80 KB)
- 无铅组件涂层的保存期评估 (PDF 1305 KB)
- Analog Signal Chain Guide (8.62 MB)
- Industrial Interface IC Solutions (101 KB)
TLK1002A 工具和软件
| 培训内容 | 型号 | 软件/工具类型 |
| TLK1002A 评估模块 | TLK1002AEVM | 开发电路板/EVM |
| TLK1002A 评估模块 | TLK1002AFPGAEVM | 开发电路板/EVM |
| TLK1002A 评估模块 | TLK1002ASMAEVM | 开发电路板/EVM |
