TMS320C5504 定点数字信号处理器
The TMS320C5504 is a member of TI's TMS320C5000™ fixed-point Digital Signal Processor (DSP) product family and is designed for low-power applications.
The TMS320C5504 fixed-point DSP is based on the TMS320C55x™ DSP generation CPU processor core. The C55x™ DSP architecture achieves high performance and low power through increased parallelism and total focus on power savings. The CPU supports an internal bus structure that is composed of one program bus, one 32-bit data read bus and two 16-bit data read buses, two 16-bit data write buses, and additional buses dedicated to peripheral and DMA activity. These buses provide the ability to perform up to four 16-bit data reads and two 16-bit data writes in a single cycle
|
TMS320C5504 |
| Applications |
Communications and Telecom,Industrial,Medical |
| Operating Systems |
DSP/BIOS |
| DSP |
1 C55x |
| DSP Instruction Type |
Fixed Point |
| DSP MHz (Max.) |
100,120,150 |
| DSP Peak MMACS |
200,240,300 |
| TI Audio Codecs |
AAC-LC,MP3,WMA |
| General Purpose Memory |
1 16-bit (Async SRAM, NAND flash, NOR flash) |
| DRAM |
SDRAM,mSDRAM |
| USB |
1 |
| MMC/SD |
2 |
| UART (SCI) |
1 |
| I2C |
1 |
| SPI |
1 |
| DMA (Ch) |
4-Ch DMA |
| IO Supply (V) |
1.8,2.5,2.8,3.3 |
| Operating Temperature Range (C) |
-10 to 70,-40 to 85 |
| Pin/Package |
196NFBGA |
| Approx. Price (US$) |
4.95 | 1ku |
TMS320C5504 特性
- High-Performance, Low-Power, TMS320C55x™ Fixed-Point Digital Signal Processor
- 16.67-, 13.33, 10-, 8.33-, 6.66ns Instruction Cycle Time
- 60-, 75-, 100-, 120-MHz Clock Rate
- One/Two Instruction(s) Executed per Cycle
- Dual Multipliers [Up to 200, 240 or 300 Million Multiply-Accumulates per Second (MMACS)]
- Two Arithmetic/Logic Units (ALUs)
- Three Internal Data/Operand Read Buses and Two Internal Data/Operand Write Buses
- Fully Software-Compatible With C55x Devices
- Industrial Temperature Devices Available
- 256 K Bytes Zero-Wait State On-Chip RAM, Composed of:
- 64K Bytes of Dual-Access RAM (DARAM), 8 Blocks of 4K × 16-Bit
- 192K Bytes of Single-Access RAM (SARAM), 24 Block of 4K × 16-bit
- 128K Bytes of Zero Wait-State On-Chip ROM (4 Blocks of 16K × 16-Bit)
- 4M × 16-Bit Maximum Addressable External Memory Space (SDRAM/mSDRAM)
- 16-/8-Bit External Memory Interface (EMIF) with Glueless Interface to:
- 8-/16-Bit NAND Flash, 1- and 4-Bit ECC
- 8-/16-Bit NOR Flash
- Asynchronous Static RAM (SRAM)
- 16-bit SDRAM/mSDRAM (1.8-, 2.5-, and 3.3-V)
- Direct Memory Access (DMA) Controller
TMS320C5504 芯片订购指南
TMS320C5504 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| TMS320C5504AZCH10 |
Green (RoHS & no Sb/Br) |
SNAGCU |
Level-3-260C-168 HR |
TMS320C5504AZCH10 |
TMS320C5504AZCH10 |
| TMS320C5504AZCH12 |
Green (RoHS & no Sb/Br) |
SNAGCU |
Level-3-260C-168 HR |
TMS320C5504AZCH12 |
TMS320C5504AZCH12 |
| TMS320C5504AZCH15 |
Green (RoHS & no Sb/Br) |
SNAGCU |
Level-3-260C-168 HR |
TMS320C5504AZCH15 |
TMS320C5504AZCH15 |
| TMS320C5504AZCHA10 |
Green (RoHS & no Sb/Br) |
Call TI |
Level-3-260C-168 HR |
TMS320C5504AZCHA10 |
TMS320C5504AZCHA10 |
| TMS320C5504AZCHA12 |
Green (RoHS & no Sb/Br) |
Call TI |
Level-3-260C-168 HR |
TMS320C5504AZCHA12 |
TMS320C5504AZCHA12 |
TMS320C5504 应用技术支持与电子电路设计开发资源下载
- TMS320C5504 数据资料 dataSheet 下载.PDF
- TI 德州仪器数字信号处理器 (DSP) & ARM 微处理器选型与价格 . xls
- OMAP-L13x/AM1x Linux PSP Overview
- ARM Assembly Language Tools v4.7 User's Guide
- ARM Optimizing C/C++ Compiler v4.7 User's Guide
- Power Management for AM18xx/AM17xx Processors
- ARM Portfolio Technical Overview Brochure
- Software and Hardware Design Challenges due to Dynamic Raw NAND Market
- Programmable Real-Time Unit (PRU): Extending Functionality Of Existing SoCs
TMS320C5504 工具与软件
