TMS320C6202B-250 定点数字信号处理器
The TMS320C6202 and TMS320C6202B devices are part of the TMS320C62x™ fixed-point DSP generation in the TMS320C6000™ DSP platform. The C62x™ DSP devices are based on the high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for multichannel and multifunction applications.
The TMS320C62x™ DSP offers cost-effective solutions to high-performance DSP-programming challenges. The TMS320C6202/02B has a performance capability of up to 2400 million instructions per second (MIPS) at 300 MHz. The C6202/02B DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors
|
TMS320C6202B-250 |
TMS320C6202B-300 |
| CPU |
1 C62x |
1 C62x |
| Peak MMACS |
500 |
600 |
| Frequency (MHz) |
250 |
300 |
| RAM (KB) |
384 KB |
384 KB |
| EMIF |
1 32-Bit |
1 32-Bit |
| External Memory Type Supported |
Async SRAM,SBSRAM,SDRAM |
Async SRAM,SBSRAM,SDRAM |
| DMA (Ch) |
4-Ch |
4-Ch |
| Expansion Bus |
1 32-Bit |
1 32-Bit |
| McBSP |
3 |
3 |
| Timers |
2 32-Bit GP |
2 32-Bit GP |
| Core Supply (Volts) |
1.5 V |
1.5 V |
| IO Supply (V) |
3.3 V |
3.3 V |
| Operating Temperature Range (°C) |
0 to 90,-40 to 105 |
0 to 90 |
| Rating |
Catalog |
Catalog |
TMS320C6202B-250 特性
- High-Performance Fixed-Point Digital Signal Processors (DSPs) – TMS320C62x™
- 5-, 4-, 3.33-ns Instruction Cycle Time
- 200-, 250-, 300-MHz Clock Rate
- Eight 32-Bit Instructions/Cycle
- 1600, 2000, 2400 MIPS
- C6202 and C6203B GLS Ball Grid Array (BGA) Packages are Pin-Compatible With the C6204 GLW BGA Package
- C6202B and C6203B GNZ and GNY Packages are Pin-Compatible
- VelociTI™ Advanced Very-Long-Instruction-Word (VLIW) C62x™ DSP Core
- Eight Highly Independent Functional Units:
- Six ALUs (32-/40-Bit)
- Two 16-Bit Multipliers (32-Bit Result)
- Load-Store Architecture With 32 32-Bit General-Purpose Registers
- Instruction Packing Reduces Code Size
- All Instructions Conditional
- Instruction Set Features
- Byte-Addressable (8-, 16-, 32-Bit Data)
- 8-Bit Overflow Protection
- Saturation
- Bit-Field Extract, Set, Clear
- Bit-Counting
TMS320C6202B-250 芯片订购指南
TMS320C6202B-250 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| TMS320C6202BGNY250 |
TBD |
SNPB |
Level-4-220C-72 HR |
TMS320C6202BGNY250 |
TMS320C6202BGNY250 |
| TMS320C6202BGNY300 |
TBD |
SNPB |
Level-4-220C-72 HR |
TMS320C6202BGNY300 |
TMS320C6202BGNY300 |
| TMS320C6202BGNZ250 |
TBD |
SNPB |
Level-4-220C-72 HR |
TMS320C6202BGNZ250 |
TMS320C6202BGNZ250 |
| TMS320C6202BGNZ300 |
TBD |
Call TI |
Level-4-220C-72 HR |
TMS320C6202BGNZ300 |
TMS320C6202BGNZ300 |
| TMS320C6202BZNY250 |
Pb-Free (RoHS Exempt) |
SNAGCU |
Level-4-260C-72HR |
TMS320C6202BZNY250 |
TMS320C6202BZNY250 |
| TMS320C6202BZNZ250 |
Pb-Free (RoHS Exempt) |
SNAGCU |
Level-4-260C-72HR |
TMS320C6202BZNZ250 |
TMS320C6202BZNZ250 |
| TMS320C6202BZNZ300 |
Pb-Free (RoHS Exempt) |
SNAGCU |
Level-4-260C-72HR |
TMS320C6202BZNZ300 |
TMS320C6202BZNZ300 |
| TMS32C6202BGNZA250 |
TBD |
SNPB |
Level-4-220C-72 HR |
TMS32C6202BGNZA250 |
TMS32C6202BGNZA250 |
TMS320C6202B-250 应用技术支持与电子电路设计开发资源下载
- TMS320C6202B-250 数据资料 dataSheet 下载.PDF
- TI 德州仪器数字信号处理器 (DSP) & ARM 微处理器选型与价格 . xls
- OMAP-L13x/AM1x Linux PSP Overview
- ARM Assembly Language Tools v4.7 User's Guide
- ARM Optimizing C/C++ Compiler v4.7 User's Guide
- Power Management for AM18xx/AM17xx Processors
- ARM Portfolio Technical Overview Brochure
- Software and Hardware Design Challenges due to Dynamic Raw NAND Market
- Programmable Real-Time Unit (PRU): Extending Functionality Of Existing SoCs
TMS320C6202B-250 工具与软件
