TMS320C6711D-200 浮点数字信号处理器
The TMS320C67x™ DSPs (including the TMS320C6711, TMS320C6711B, TMS320C6711C, TMS320C6711D devices) compose the floating-point DSP family in the TMS320C6000™ DSP platform. The C6711, C6711B, C6711C, and C6711D devices are based on the high-performance, advanced very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for multichannel and multifunction applications.
With performance of up to 1200 million floating-point operations per second (MFLOPS) at a clock rate of 200 MHz or up to 1500 MFLOPS at a clock rate of 250 MHz, the C6711D device also offers cost-effective solutions to high-performance DSP programming challenges. The C6711D DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors
|
TMS320C6711D-167 |
TMS320C6711D-200 |
TMS320C6711D-250 |
| CPU |
1 C67x |
1 C67x |
1 C67x |
| Peak MMACS |
334 |
400 |
500 |
| Frequency (MHz) |
167 |
200 |
250 |
| On-Chip L1/SRAM |
8 KB |
8 KB |
8 KB |
| On-Chip L2/SRAM |
64 KB |
64 KB |
64 KB |
| EMIF |
1 32-Bit |
1 32-Bit |
1 32-Bit |
| External Memory Type Supported |
Async. SRAM,SBSRAM,SDRAM |
Async. SRAM,SBSRAM,SDRAM |
Async. SRAM,SBSRAM,SDRAM |
| DMA (Ch) |
16-Ch EDMA |
16-Ch EDMA |
16-Ch EDMA |
| HPI |
1 16-Bit |
1 16-Bit |
1 16-Bit |
| McBSP |
2 |
2 |
2 |
| Timers |
2 32-Bit GP |
2 32-Bit GP |
2 32-Bit GP |
| Core Supply (Volts) |
1.26 |
1.26 |
1.4 V |
| IO Supply (V) |
3.3 V |
3.3 V |
3.3 V |
| Operating Temperature Range (°C) |
0 to 90,-40 to 105 |
0 to 90 |
0 to 90 |
| Rating |
Catalog |
Catalog |
Catalog |
TMS320C6711D-200 特性
- Excellent-Price/Performance Floating-Point Digital Signal Processor (DSP):
- Eight 32-Bit Instructions/Cycle
- 167-, 200-, 250-MHz Clock Rates
- 6-, 5-, 4-ns Instruction Cycle Time
- 1000, 1200, 1500 MFLOPS
- Advanced Very Long Instruction Word (VLIW) C67x™ DSP Core
- Eight Highly Independent Functional Units:
- Four ALUs (Floating- and Fixed-Point)
- Two ALUs (Fixed-Point)
- Two Multipliers (Floating- and Fixed-Point)
- Load-Store Architecture With 32 32-Bit General-Purpose Registers
- Instruction Packing Reduces Code Size
- All Instructions Conditional
- Instruction Set Features
- Hardware Support for IEEE Single-Precision and Double-Precision Instructions
- Byte-Addressable (8-, 16-, 32-Bit Data)
- 8-Bit Overflow Protection
- Saturation
- Bit-Field Extract, Set, Clear
- Bit-Counting
TMS320C6711D-200 芯片订购指南
TMS320C6711D-200 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| TMS320C6711DGDP200 |
TBD |
SNPB |
Level-3-220C-168 HR |
TMS320C6711DGDP200 |
TMS320C6711DGDP200 |
| TMS320C6711DGDP250 |
TBD |
SNPB |
Level-3-220C-168 HR |
TMS320C6711DGDP250 |
TMS320C6711DGDP250 |
| TMS320C6711DZDP200 |
Pb-Free (RoHS) |
SNAGCU |
Level-3-260C-168 HR |
TMS320C6711DZDP200 |
TMS320C6711DZDP200 |
| TMS320C6711DZDP250 |
Pb-Free (RoHS) |
SNAGCU |
Level-3-260C-168 HR |
TMS320C6711DZDP250 |
TMS320C6711DZDP250 |
| TMS32C6711DGDPA167 |
TBD |
SNPB |
Level-3-220C-168 HR |
TMS32C6711DGDPA167 |
TMS32C6711DGDPA167 |
| TMS32C6711DZDPA167 |
Pb-Free (RoHS) |
SNAGCU |
Level-3-260C-168 HR |
TMS32C6711DZDPA167 |
TMS32C6711DZDPA167 |
TMS320C6711D-200 应用技术支持与电子电路设计开发资源下载
- TMS320C6711D-200 数据资料 dataSheet 下载.PDF
- TI 德州仪器数字信号处理器 (DSP) & ARM 微处理器选型与价格 . xls
- OMAP-L13x/AM1x Linux PSP Overview
- ARM Assembly Language Tools v4.7 User's Guide
- ARM Optimizing C/C++ Compiler v4.7 User's Guide
- Power Management for AM18xx/AM17xx Processors
- ARM Portfolio Technical Overview Brochure
- Software and Hardware Design Challenges due to Dynamic Raw NAND Market
- Programmable Real-Time Unit (PRU): Extending Functionality Of Existing SoCs
TMS320C6711D-200 工具与软件
