TS5A26542

The TS5A26542 is a dual single-pole double-throw (SPDT) analog switch that is designed to operate from 2.25 V to 5.5 V. The device offers a low ON-state resistance with an excellent channel-to-channel ON-state resistance matching, and the break-before-make feature to prevent signal distortion during the transferring of a signal from one path to the another. The device has excellent total harmonic distortion (THD) performance and consumes very low power. These features make this device suitable for portable audio applications.

The TS5A26542 has a separate logic supply pin (VIO) that operates from 1.65 V to 1.95 V. VIO powers the control circuitry, which allows the TS5A26542 to be controlled by 1

TS5A26542
Configuration 2 X SPDT  
ron(max)(ohms) 0.75  
IL OFF(Max)(nA) N/A  
OFF Time(Max)(ns) 25  
ON Time(Max)(ns) 30  
Operating Temperature Range(°C) -40 to 85  
Pin/Package 12DSBGA  
Approx. Price (US$) 0.42 | 1ku  
VCC(Min)(V) 5.5  
VCC(Max)(V) 5.5  
Voltage Nodes(V) 2.5, 3.0, 3.3, 5.0  
RON Flatness(Max)(Ohms) 0.25  
Technology Family TS  
ESD Rating(kV) 15kV Contact Discharge (IEC L-4)  
Bandwidth(MHz) 43  
Charge Injection(Max)(pC) 15  
RON Mis-match(Max)(Ohms) 0.1  
Voltage Node(V) 2.5, 3.0, 3.3, 5.0  
Vcc max(V) 5.5  
Vcc min(V) 2.25  
Number of Channels 2  
ICC(uA) 0.75  
Rating Catalog
TS5A26542 特性
TS5A26542 芯片订购指南
器件 状态 温度 价格 封装 | 引脚 封装数量 | 封装载体 丝印标记
TS5A26542YZTR ACTIVE -40 to 85 0.42 | 1ku DSBGA (YZG) | 12 3000 | LARGE T&R  
TS5A26542 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
TS5A26542YZTR Green (RoHS & no Sb/Br)  SNAGCU  Level-1-260C-UNLIM TS5A26542YZTR TS5A26542YZTR
TS5A26542 应用技术支持与电子电路设计开发资源下载
  1. TS5A26542 数据资料 dataSheet 下载.PDF
  2. TI 德州仪器信号开关产品选型与价格 . xls
  3. Logic Guide 2009 (PDF 4263 KB)
  4. 防止模拟开关的额外功耗 (PDF 392 KB) (PDF 1305 KB)
  5. Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
  6. TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
  7. Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
  8. CMOS Power Consumption and CPD Calculation (PDF 89 KB)
  9. Designing With Logic (PDF 186 KB)
  10. Live Insertion (PDF 150 KB)
  11. Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
  12. Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
  13. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  14. LOGIC Pocket Data Book (PDF 6001 KB)
  15. HiRel Unitrode Power Management Brochure (PDF 206 KB)
  16. Logic Cross-Reference (PDF 2938 KB)