TSB12LV32 通用链路层控制器 (GP2Lynx)
The TSB12LV32 (GP2Lynx) is a high-performance general-purpose IEEE 1394a-2000 link-layer controller (LLC) with the capability of transferring data between the 1394 Phy-link interface, an external host controller, and an external device connected to the data-mover port (local bus interface). The 1394 Phy-link interface provides the connection to a 1394 physical layer device and is supported by the LLC. The LLC provides the control for transmitting and receiving 1394 packet data between the microcontroller interface and the Phy-link interface via internal 2-Kbyte FIFOs at rates up to 400 Mbps. The TSB12LV32 transmits and receives correctly formatted 1394 packets, generates and detects the 1394 cycle start packets, communicates transaction layer transmit requests to the Phy, and generates and inspects the 32-bit cyclic redundancy check (CRC).
|
TSB12LV32 |
| Supply Voltage(s)(V) |
3.3 |
| Speed(Max)(Mbps) |
400 |
| FIFO(kb) |
4 |
| Pin/Package |
100LQFP |
| Operating Temperature Range(°C) |
0 to 70 |
| Rating |
Catalog |
TSB12LV32 特性
- Compliant With IEEE 1394-1995 Standards and P1394a Supplement for High Performance Serial Bus (1)
- Supports Transfer Rates of 400, 200, or 100 Mbit/s
- Compatible With Texas Instruments Physical Layer Controllers (Phys)
- Supports the Texas Instruments Bus Holder Galvanic Isolation Barrier
- Glueless Interface to 68000 and ColdFire Microcontrollers/Microprocessors
- Supports ColdFire Burst Transfers
- 2K-Byte General Receive FIFO (GRF) Accessed Through Microcontroller Interface Supports Asynchronous and Isochronous Receive
- 2K-Byte Asynchronous Transmit FIFO (ATF) Accessed Through Microcontroller Interface Supports Asynchronous Transmissions
- Programmable Microcontroller Interface With 8-Bit or 16-Bit Data Bus, Multiple Modes of Operation Including Burst Mode, and Clock Frequency to 60 MHz
- 8-Bit or 16-Bit Data Mover Port (DM Port) Supports Isochronous, Asynchronous, and Streaming Transmit/Receive From an Unbuffered Port at a Clock Frequency of 25 MHz
- Backward Compatible With All TSB12LV31(GPLynx) Microcontroller and Data Mover Functionality in Hardware
- Two-Channel Support for Isochronous Receive to Unbufferred 8/16 Data-Mover Port
- Four-Channel Support for Isochronous Transmit From Unbufferred 8/16 Bit Data Mover Port
- Single 3.3-V Supply Operation With 5-V Tolerance Using 5-V Bias Terminals
- High Performance 100-Pin PZ Package
TSB12LV32 芯片订购指南
| 器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| TSB12LV32IPZ |
NRND |
-40 to 85 |
6.70 | 1ku |
TQFP (PZT) | 100 |
1 |
|
| TSB12LV32PZ |
ACTIVE |
0 to 70 |
6.05 | 1ku |
TQFP (PZT) | 100 |
90 | JEDEC TRAY (10+1) |
|
| TSB12LV32PZG4 |
ACTIVE |
0 to 70 |
6.05 | 1ku |
TQFP (PZT) | 100 |
90 | JEDEC TRAY (10+1) |
|
TSB12LV32 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| TSB12LV32IPZ |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-3-260C-168 HR |
TSB12LV32IPZ |
TSB12LV32IPZ |
| TSB12LV32PZ |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-4-260C-72 HR |
TSB12LV32PZ |
TSB12LV32PZ |
| TSB12LV32PZG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-4-260C-72 HR |
TSB12LV32PZG4 |
TSB12LV32PZG4 |
TSB12LV32 应用技术支持与电子电路设计开发资源下载
- TSB12LV32 数据资料 dataSheet 下载.PDF
- TI 德州仪器1394 链路层控制器产品选型与价格 . xls
- Analog Signal Chain Guide (8.62 MB)
- Industrial Interface IC Solutions (101 KB)
