TSB82AA2B 1394b OHCI-Lynx Controller
The TSB82AA2B OHCI-Lynx. controller is a discrete 1394b link-layer device, which has been designed to meet the demanding requirements of today's 1394 bus designs. The TSB82AA2B device is capable of exceptional 800M bits/s performance; thus, providing the throughput and bandwidth to move data efficiently and quickly between the PCI and 1394 buses. The TSB82AA2B device also provides outstanding ultra-low power operation and intelligent power management capabilities. The device provides the IEEE 1394 link function and is compatible with 100M bits/s, 200M bits/s, 400M bits/s, and 800M bits/s serial bus data rates.
The TSB82AA2B improved throughput and increased bandwidth make it ideal for today's high-end PCs and open the door for the development of S800 RAID- and SAN-based peripherals
|
TSB82AA2B |
Supply Voltage(s)(V) |
3.3 |
Speed(Max)(Mbps) |
800 |
FIFO(kb) |
11 |
Pin/Package |
144LQFP |
Operating Temperature Range(°C) |
-40 to 85 |
Rating |
Catalog |
TSB82AA2B 特性
- Single 3.3-V supply (1.8-V internal core voltage with regulator)
- 3.3-V and 5-V PCI signaling environments
- Serial bus data rates of 100M bits/s, 200M bits/s, 400M bits/s, and 800M bits/s
- Physical write posting of up to three outstanding transactions
- Serial ROM or boot ROM interface supports 2-wire serial EEPROM devices
- 33-MHz/64-bit and 33-MHz/32-bit selectable PCI interface
- Multifunction terminal (MFUNC terminal 1)
- PCI_CLKRUN protocol per the PCI Mobile Design Guide
- General-purpose I/O
- CYCLEIN/CYCLEOUT for external cycle timer control for customized synchronization
- PCI burst transfers and deep FIFOs to tolerate large host latency
- Transmit FIFO—5K asynchronous
- Transmit FIFO—2K isochronous
- Receive FIFO—2K asynchronous
- Receive FIFO—2K isochronous
- D0, D1, D2, and D3 power states and PME events per the PCI Bus Power Management Interface Specification
- Programmable asynchronous transmit threshold
- Isochronous receive dual-buffer mode
- Out-of-order pipelining for asynchronous transmit requests
- Register access fail interrupt when the PHY SYSCLK is not active
TSB82AA2B 芯片订购指南
器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
TSB82AA2BIPGE |
ACTIVE |
-40 to 85 |
8.60 | 1ku |
LQFP (PGE) | 144 |
60 | JEDEC TRAY (10+1) |
|
TSB82AA2BPGE |
ACTIVE |
|
7.80 | 1ku |
LQFP (PGE) | 144 |
60 | JEDEC TRAY (10+1) |
|
TSB82AA2BPGEG4 |
ACTIVE |
|
7.80 | 1ku |
LQFP (PGE) | 144 |
60 | JEDEC TRAY (10+1) |
|
TSB82AA2B 质量与无铅数据
器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
TSB82AA2BIPGE |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
TSB82AA2BIPGE |
TSB82AA2BIPGE |
TSB82AA2BPGE |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
TSB82AA2BPGE |
TSB82AA2BPGE |
TSB82AA2BPGEG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
TSB82AA2BPGEG4 |
TSB82AA2BPGEG4 |
TSB82AA2B 应用技术支持与电子电路设计开发资源下载
- TSB82AA2B 数据资料 dataSheet 下载.PDF
- TI 德州仪器1394 链路层控制器产品选型与价格 . xls
- Analog Signal Chain Guide (8.62 MB)
- Industrial Interface IC Solutions (101 KB)