UC1825-SP 高速 PWM 控制器

The UC1825 PWM control device is optimized for high-frequency switched mode power supply applications. Particular care was given to minimizing propagation delays through the comparators and logic circuitry while maximizing bandwidth and slew rate of the error amplifier. This controller is designed for use in either current-mode or voltage mode systems with the capability for input voltage feed-forward.

Protection circuitry includes a current limit comparator with a 1-V threshold, a TTL compatible shutdown port, and a soft start pin which will double as a maximum duty-cycle clamp. The logic is fully latched to provide jitter-free operation and prohibit multiple pulses at an output. An undervoltage lockout section with 800 mV of hysteresis assures low start up current

UC1825-SP
Control Method Current    
Duty Cycle (Max) (%) 50    
Frequency (Max) (kHz) 1000    
UVLO Thresholds On/Off (V) 9.2/8.4    
Pin/Package 16CDIP, 20LCCC
Regulated Outputs (#) 2    
Operating Temperature Range (C) -55 to 125    
Rating Space
UC1825-SP 特性
UC1825-SP 芯片订购指南
器件 状态 温度 (oC) 价格(美元) 封装 | 引脚 封装数量 | 封装载体 丝印标记
5962-8768101V2A ACTIVE -55 to 125 336.10 | 100u LCCC (FK) | 20 1 | TUBE  
5962-8768101VEA ACTIVE -55 to 125 310.05 | 100u CDIP (J) | 16 1 | TUBE  
5962-8768104V2A ACTIVE -55 to 125 439.20 | 100u LCCC (FK) | 20 1 | TUBE  
5962-8768104VEA ACTIVE -55 to 125 418.65 | 100u CDIP (J) | 16 1 | TUBE  
UC1825-SP 质量与无铅数据
器件 环保计划* 铅/焊球涂层 MSL 等级/回流焊峰 环保信息与无铅 (Pb-free) DPPM / MTBF / FIT 率
5962-8768101V2A TBD   POST-PLATE   N/A for Pkg Type 5962-8768101V2A 5962-8768101V2A
5962-8768101VEA TBD   A42   N/A for Pkg Type 5962-8768101VEA 5962-8768101VEA
5962-8768104V2A TBD   POST-PLATE   N/A for Pkg Type 5962-8768104V2A 5962-8768104V2A
5962-8768104VEA TBD   A42   N/A for Pkg Type 5962-8768104VEA 5962-8768104VEA
UC1825-SP 工具与软件
培训内容 型号 软件/工具类型
最常用开关模式电源的功率级设计器 POWERSTAGE-DESIGNER Texas Instruments
UC1825-SP 应用技术支持与电子电路设计开发资源下载
  1. UC1825-SP数据资料 dataSheet 下载.PDF
  2. TI 德州仪器电源管理选型与价格参考 . xls