LAN9117

Please consider this device

The LAN9117 is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance, flexibility, ease of integration and system cost control are required. The LAN9117 has been specifically architected to provide the highest performance possible for any 16-bit application. The LAN9117 is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant.

The LAN9117 includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. The simple, yet highly functional host bus interface provides a glue-less connection to most common 16-bit microprocessors and microcontrollers as well as 32-bit microprocessors exposing a 16-bit external bus. The LAN9117 includes large transmit and receive data FIFOs with a high-speed host bus interface to accommodate high bandwidth, high-latency applications. In addition, the LAN9117 memory buffer architecture allows the most efficient use of memory resources by optimizing packet granularity.

Features
  • Member of LAN9118 Family; optimized for medium-high performance applications
  • Easily interfaces to most 16-bit embedded CPU's
  • Efficient architecture with low CPU overhead
  • Integrated PHY; supports external PHY via MII interface
  • Supports audio & video streaming over Ethernet: 1-2 high-definition (HD) MPEG2 streams
  • Medium-high speed member of LAN9118 Family (all members are pin-compatible)
  • Medium-range Cable, satellite, and IP set-top boxes
  • Digital video recorders and DVD recorders/players
  • High definition televisions
  • Digital media clients/servers and home gateways
  • Video-over IP solutions, IP PBX & video phones
  • Wireless routers & access points
  • High-end audio distribution systems
  • Non-PCI Ethernet controller for medium-high performance applications 16-bit interface with fast bus cycle times Burst-mode read support External MII interface
  • 16-bit interface with fast bus cycle times
  • Burst-mode read support
  • External MII interface
  • Eliminates dropped packets Internal buffer memory can store over 200 packets Supports automatic or host-triggered PAUSE and back-pressure flow control
  • Internal buffer memory can store over 200 packets
  • Supports automatic or host-triggered PAUSE and back-pressure flow control
  • Minimizes CPU overhead Supports Slave-DMA Interrupt Pin with Programmable Hold-off timer
  • Supports Slave-DMA
  • Interrupt Pin with Programmable Hold-off timer
  • Reduces system cost and increases design flexibility SRAM-like interface easily interfaces to most Embedded CPU's or SoC's Low-cost, low-pin count non-PCI interface for embedded designs
  • SRAM-like interface easily interfaces to most Embedded CPU's or SoC's
  • Low-cost, low-pin count non-PCI interface for embedded designs
  • Reduced-Power Modes Numerous power management modes Wake on LAN* Magic packet wakeup* Wakeup indicator event signal Link Status Change
  • Numerous power management modes
  • Wake on LAN*
  • Magic packet wakeup*
  • Wakeup indicator event signal
  • Link Status Change
  • Single chip Ethernet controller Fully compliant with IEEE 802.3/802.3u standards Integrated Ethernet MAC and PHY 10BASE-T and 100BASE-TX support Full- and Half-duplex support Full-duplex flow control Backpressure for half-duplex flow control Preamble generation and removal Automatic 32-bit CRC generation and checking Automatic payload padding and pad removal Loop-back modes
  • Fully compliant with IEEE 802.3/802.3u standards
  • Integrated Ethernet MAC and PHY
  • 10BASE-T and 100BASE-TX support
  • Full- and Half-duplex support
  • Full-duplex flow control
  • Backpressure for half-duplex flow control
  • Preamble generation and removal
  • Automatic 32-bit CRC generation and checking
  • Automatic payload padding and pad removal
  • Loop-back modes
  • Flexible address filtering modes One 48-bit perfect address 64 hash-filtered multicast addresses Pass all multicast Promiscuous mode Inverse filtering Pass all incoming with status report Disable reception of broadcast packets
  • One 48-bit perfect address
  • 64 hash-filtered multicast addresses
  • Pass all multicast
  • Promiscuous mode
  • Inverse filtering
  • Pass all incoming with status report
  • Disable reception of broadcast packets
  • Integrated Ethernet PHY Auto-negotiation Automatic polarity detection and correction
  • Auto-negotiation
  • Automatic polarity detection and correction
  • High-Performance host bus interface Simple, SRAM-like interface 16-bit data bus Large, 16Kbyte FIFO memory that can be allocated to RX or TX functions One configurable host interrupt
  • Simple, SRAM-like interface
  • 16-bit data bus
  • Large, 16Kbyte FIFO memory that can be allocated to RX or TX functions
  • One configurable host interrupt
  • Miscellaneous features Low profile 100-pin, TQFP RoHS Compliant package Integral 1.8V regulator General Purpose Timer Support for optional EEPROM Support for 3 status LEDs multiplexed with Programmable GPIO signals
  • Low profile 100-pin, TQFP RoHS Compliant package
  • Integral 1.8V regulator
  • General Purpose Timer
  • Support for optional EEPROM
  • Support for 3 status LEDs multiplexed with Programmable GPIO signals
  • 3.3V Power Supply with 5V tolerant I/O
  • 0° to 70°C
Parameter
Parameter Name Value Value
Description 10Based-T/100Based-TX Ethernet Controller with 16 bit interface 10Based-T/100Based-TX Ethernet Controller with 16 bit interface
Ethernet Bandwidth 10Base-T/ 100Base-TX 10Base-T/ 100Base-TX
MAC Yes Yes
PHY Yes Yes
TX/RX RAM Buffer(Bytes) 16K 16K
Interrupt Pin 1 1
LEDs 3 3
Op. Voltage (V) 3.3 3.3
# Ethernet Ports 1 1
Temp. Range Max. (°C) 70 70
Mixed Endian Yes Yes
Interface1 16-Bit 16-Bit
Vdd I/O (V) 3.3 3.3
Documents
LAN9117 High-Performance Single-Chip 10/100 Non-PCI Ethernet Controller Data ShData Sheets07/11/20081498KB
AN12.12 - LAN9118 Family Programmer Reference GuideAppNote12/15/2009561KB
AN12.19 - Designing for LAN9118 Family Footprint CompatibilityAppNote06/07/2005206KB
AN17.10 - Migrating from the LAN9117 to the LAN9211AppNote04/25/2014215KB
AN17.18 - SMSC Design Guide for Power over Ethernet ApplicationsAppNote09/20/2009445KB
AN2157 - Transient Protection in Power Over Ethernet ApplicationsAppNote05/24/2016229KB
AN24.16 - LAN9xxx Series MigrationAppNote04/25/2014422KB
AN8.13 - Suggested MagneticsAppNote06/28/2011240KB
LAN9117 IBIS ModelIBIS04/08/2005237KB
LAN91xx/LAN92xx uboot driver for ARMSoftware Library08/22/2008
LAN91xx/LAN92xx VxWorks 5.5 driver on SH3 processorSoftware Library04/14/2009
LAN91xx/LAN92xx/LAN9311/LAN9312 eBoot Driver for XScale ProcessorSoftware Library06/01/2007
LAN91xx/LAN92xx/LAN9311/LAN9312 Linux Driver on SH3 ProcessorSoftware Library08/22/2008
LAN91xx/LAN92xx/LAN9311/LAN9312 Linux driver on XScale processorSoftware Library08/22/2008
LAN91xx/LAN92xx/LAN9311/LAN9312 Windows CE 5.0 & 6.0 DriverSoftware Library01/29/2014
LAN9117 100-pin TQFP Package Component Placement ChecklistDesign Checklist09/18/200646KB
LAN9117 100-pin TQFP Package Routing ChecklistDesign Checklist09/25/200655KB
LAN9117 TQFP Rev C Schematic ChecklistDesign Checklist07/19/200783KB
LAN9117 High-Performance Single-Chip 10/100 Non-PCI Ethernet Controller Data BrProduct Briefs07/11/2008223KB
LAN9117 Reference Design Bill of MaterialsSchematics06/20/200722KB
LAN9117 Reference Design SchematicSchematics07/09/200746KB
Ordering Information
Part NumberLeadsPackage TypeTemp RangePacking1+26+100+1000+5000+
LAN9117-MT100LQFP0C to +70CTRAY11.659.718.828.528.43
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RoHS Information
PartNumberDeviceWeightShippingWeightLeadCountPackageTypePackageWidthSolderCompositionJEDECIndicatorRoHSChinaEFUP
LAN9117-MT0.5804006.666667100LQFP14x14x1.6mmMatte Tine3
LAN9117 High-Performance Single-Chip 10/100 Non-PCI Ethernet Controller Data Sh LAN9117
AN12.12 LAN9118
AN12.19 LAN9117
AN17.10 LAN9117
AN17.18 LAN9313
AN2157 LAN9353
AN24.16 LAN9221
AN8.13 LAN9355
LAN9117 100-pin TQFP Package Component Placement Checklist LAN9117
LAN9117 100-pin TQFP Package Routing Checklist LAN9117
LAN9117 TQFP Rev C Schematic Checklist LAN9117
LAN9117 High-Performance Single-Chip 10/100 Non-PCI Ethernet Controller Data Br LAN9117
LAN9117 Reference Design Bill of Materials LAN9117
LAN9117 Reference Design Schematic LAN9117