SN65LVDS310 QVGA-VGA 27 位显示屏串行接口发送器
The SN65LVDS310 receiver deserializes FlatLink 3G-compliant serial input data to 27 parallel data outputs. The SN65LVDS310 receiver contains one shift register to load 30 bits from one serial input and latches the 24 pixel bits and 3 control bits out to the parallel CMOS outputs after checking the parity bit. If a parity error is detected, the data output bus disregards the newly received pixel. Instead, the last data word is held on the output bus for another clock cycle.
The serial data and clock are received via sub-low-voltage differential signalling (SubLVDS) lines. The SN65LVDS310 supports three operating power modes (shutdown, standby, and active) to conserve power.
When receiving, the PLL locks to the incoming clock, CLK, and generates an internal high-speed clock at the line rate of the data lines
|
SN65LVDS310 |
Number of Parallel Outputs |
27 |
Data Throughput(MB/s) |
405 |
Serial Data Receiver Channels |
1 |
Type of Line Circuit |
subLVDS |
Supply Voltage(s)(V) |
1.8 |
ICC(mA) |
25 |
PLL Frequency(MHz) |
4 - 15 |
Operating Temperature Range(°C) |
-40 to 85 |
Pin/Package |
48BGA MICROSTAR JUNIOR |
SN65LVDS310 特性
- Serial Interface Technology
- Compatible With FlatLink 3G Transmitters (E.g., SN65LVDS305 or SN65LVDS307)
- Supports Video Interfaces up to 24-Bit RGB Data and 3 Control Bits Received Over One SubLVDS Differential Data Line
- SubLVDS Differential Voltage Levels
- Up to 405-Mbps Data Throughput
- Three Operating Modes to Conserve Power
- Active mode QVGA: 17 mW
- Typical Shutdown: 0.7 µW
- Typical Standby Mode: 67 µW Typical
- ESD Rating > 4 kV (HBM)
- Pixel-Clock Range of 4 MHz – 15 MHz
- Failsafe on All CMOS Inputs
- Packaged in 4-mm × 4-mm MicroStar Junior™µBGA With 0,5-mm Ball Pitch
- Very Low EMI
- APPLICATIONS
- Small Low-Emission Interface Between Graphics Controller and LCD Display
- Mobile Phones and Smart Phones
- Portable Multimedia Players
SN65LVDS310 芯片订购指南
SN65LVDS310 质量与无铅数据
器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
SN65LVDS310ZQCR |
Green (RoHS & no Sb/Br) |
SNAGCU |
Level-3-260C-168 HR |
SN65LVDS310ZQCR |
SN65LVDS310ZQCR |
SN65LVDS310ZQCT |
Green (RoHS & no Sb/Br) |
SNAGCU |
Level-3-260C-168 HR |
SN65LVDS310ZQCT |
SN65LVDS310ZQCT |
SN65LVDS310 应用技术支持与电子电路设计开发资源下载
- SN65LVDS310 数据资料 dataSheet 下载.PDF
- TI 德州仪器FlatLink选型与价格 . xls
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
- 使用 TI 的 SN65LVDS310 收发器改善 CAN 网络安全性 (zhct033.PDF, 299 KB)
- Isolated CAN Reference Design (PDF 48 KB)
- Isolated RS-485 Reference Design (PDF 80 KB)
- 无铅组件涂层的保存期评估 (PDF 1305 KB)
- Isolated CAN EVM User's Guide (PDF 1168 KB)
- Energy Harvesting: Solar Solutions Guide (PDF 409 KB)
- Analog Signal Chain Guide (8.62 MB)
- Industrial Interface IC Solutions (101 KB)
SN65LVDS310 工具与软件
培训内容 |
型号 |
软件/工具类型 |
通过 CAN 总线进行工业控制的演示平台 |
CANBUS-DEMO |
硬件参考设计 |