SN75LVDS82 FlatLink(TM) 接收器
The SN75LVDS82 FlatLink™ receiver contains four serial-in, 7-bit parallel-out shift registers, a 7× clock synthesizer, and five low-voltage differential signaling (LVDS) line receivers in a single integrated circuit.
These functions allow receipt of synchronous data from a compatible transmitter, such as the SN75LVDS81, over five balanced-pair conductors, and expansion to 28 bits of single-ended low-voltage TTL (LVTTL) synchronous data at a lower transfer rate. The SN75LVDS82 can also be used with the SN75LVDS84 or SN75LVDS85 for 21-bit transfers.
When receiving, the high-speed LVDS data is received and loaded into registers at the rate of seven times (7×) the LVDS input clock (CLKIN).
|
SN75LVDS82 |
Number of Parallel Outputs |
28 |
Number of Parallel Inputs |
|
Data Throughput(MB/s) |
227.5 |
Serial Data Receiver Channels |
4 |
Serial Data Transmitter Channels |
|
Type of Line Circuit |
LVDS |
Driver (RL)(Ohms) |
|
Receiver (Vth)(mV) |
100 |
Supply Voltage(s)(V) |
3.3 |
Driver tpd(ns) |
|
Receiver tpd(ns) |
8.7 |
ICC(mA) |
125 |
PLL Frequency(MHz) |
31 - 68 |
Footprint |
DS90C582 |
Operating Temperature Range(°C) |
0 to 70 |
Pin/Package |
56TSSOP |
SN75LVDS82 特性
- 4:28 Data Channel Expansion at up to 238 Mbytes/s Throughput
- Suited for SVGA, XGA, or SXGA Display
Data Transmission From Controller to
Display With Very Low EMI
- Four Data Channels and Clock Low-Voltage
Differential Channels In and 28 Data and
Clock Low-Voltage TTL Channels Out
- Operates From a Single 3.3-V Supply With
250 mW (Typ)
- 5-V Tolerant SHTDN Input
- Falling Clock-Edge-Triggered Outputs
- Packaged in Thin Shrink Small-Outline
Package (TSSOP) With 20-Mil Terminal Pitch
- Consumes Less Than 1 mW When Disabled
- Wide Phase-Lock Input Frequency
Range . . . 31 MHz to 68 MHz
- No External Components Required for PLL
- Inputs Meet or Exceed the Requirements of
ANSI EIA/TIA-644 Standard
- Improved Replacement for the National™ DS90C582
SN75LVDS82 芯片订购指南
器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
SN75LVDS82DGG |
ACTIVE |
0 to 70 |
2.90 | 1ku |
TSSOP (DGG) | 56 |
35 | TUBE |
|
SN75LVDS82DGGG4 |
ACTIVE |
0 to 70 |
2.90 | 1ku |
TSSOP (DGG) | 56 |
35 | TUBE |
|
SN75LVDS82DGGR |
ACTIVE |
0 to 70 |
2.45 | 1ku |
TSSOP (DGG) | 56 |
2000 | LARGE T&R |
|
SN75LVDS82DGGRG4 |
ACTIVE |
0 to 70 |
2.45 | 1ku |
TSSOP (DGG) | 56 |
2000 | LARGE T&R |
|
SN75LVDS82 质量与无铅数据
器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
SN75LVDS82DGG |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SN75LVDS82DGG |
SN75LVDS82DGG |
SN75LVDS82DGGG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SN75LVDS82DGGG4 |
SN75LVDS82DGGG4 |
SN75LVDS82DGGR |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SN75LVDS82DGGR |
SN75LVDS82DGGR |
SN75LVDS82DGGRG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SN75LVDS82DGGRG4 |
SN75LVDS82DGGRG4 |
SN75LVDS82 应用技术支持与电子电路设计开发资源下载
- SN75LVDS82 数据资料 dataSheet 下载.PDF
- TI 德州仪器FlatLink选型与价格 . xls
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
- 使用 TI 的 SN75LVDS82 收发器改善 CAN 网络安全性 (zhct033.PDF, 299 KB)
- Isolated CAN Reference Design (PDF 48 KB)
- Isolated RS-485 Reference Design (PDF 80 KB)
- 无铅组件涂层的保存期评估 (PDF 1305 KB)
- Isolated CAN EVM User's Guide (PDF 1168 KB)
- Energy Harvesting: Solar Solutions Guide (PDF 409 KB)
- Analog Signal Chain Guide (8.62 MB)
- Industrial Interface IC Solutions (101 KB)
SN75LVDS82 工具与软件
培训内容 |
型号 |
软件/工具类型 |
通过 CAN 总线进行工业控制的演示平台 |
CANBUS-DEMO |
硬件参考设计 |