SN75LVDS83 FlatLink(TM) 接收器
The SN75LVDS83 FlatLink transmitter contains four 7-bit parallel-load serial-out shift registers, a 7× clock synthesizer, and five low-voltage differential-signaling (LVDS) line drivers in a single integrated circuit. These functions allow 28 bits of single-ended low-voltage TTL (LVTTL) data to be synchronously transmitted over five balanced-pair conductors for receipt by a compatible receiver, such as the SN75LVDS82. The SN75LVDS83 can also be used in 21-bit links with the SN75LVDS86 receiver.
When transmitting, data bits D0 through D27 are each loaded into registers upon the edge of the input clock signal (CLKIN). The rising or falling edge of the clock can be selected by way of the clock select (CLKSEL) terminal
|
SN75LVDS83 |
| Number of Parallel Inputs |
28 |
| Data Throughput(MB/s) |
227.5 |
| Serial Data Transmitter Channels |
4 |
| Type of Line Circuit |
LVDS |
| Driver (RL)(Ohms) |
100 |
| Supply Voltage(s)(V) |
3.3 |
| Driver tpd(ns) |
14.2 |
| ICC(mA) |
110 |
| PLL Frequency(MHz) |
32 - 68 |
| Footprint |
DS90C581 |
| Operating Temperature Range(°C) |
0 to 70 |
| Pin/Package |
56TSSOP |
SN75LVDS83 特性
- 4:28 Data Channel Compression at up to 238 MBytes/s Throughput
- Suited for SVGA, XGA, or SXGA Display Data Transmission From Controller to Display With Very Low EMI
- 28 Data Channels and Clock-In Low-Voltage TTL
- 4 Data Channels and Clock-Out Low-Voltage Differential
- Operates From a Single 3.3-V Supply With 250 mW (Typ)
- ESD Protection Exceeds 6 kV
- 5-V Tolerant Data Inputs
- Selectable Rising or Falling Edge-Triggered Inputs
- Packaged in Thin Shrink Small-Outline Package With 20-Mil Terminal Pitch
- Consumes Less Than 1 mW When Disabled
- Wide Phase-Lock Input Frequency Range . . . 31 MHz to 68 MHz
- No External Components Required for PLL
- Outputs Meet or Exceed the Requirements of ANSI EIA/TIA-644 Standard
- Improved Replacement for the DS90C581
SN75LVDS83 芯片订购指南
| 器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| SN75LVDS83DGG |
ACTIVE |
0 to 70 |
2.90 | 1ku |
TSSOP (DGG) | 56 |
35 | TUBE |
|
| SN75LVDS83DGGG4 |
ACTIVE |
0 to 70 |
2.90 | 1ku |
TSSOP (DGG) | 56 |
35 | TUBE |
|
| SN75LVDS83DGGR |
ACTIVE |
0 to 70 |
2.45 | 1ku |
TSSOP (DGG) | 56 |
2000 | LARGE T&R |
|
| SN75LVDS83DGGRG4 |
ACTIVE |
0 to 70 |
2.45 | 1ku |
TSSOP (DGG) | 56 |
2000 | LARGE T&R |
|
SN75LVDS83 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| SN75LVDS83DGG |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SN75LVDS83DGG |
SN75LVDS83DGG |
| SN75LVDS83DGGG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SN75LVDS83DGGG4 |
SN75LVDS83DGGG4 |
| SN75LVDS83DGGR |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SN75LVDS83DGGR |
SN75LVDS83DGGR |
| SN75LVDS83DGGRG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SN75LVDS83DGGRG4 |
SN75LVDS83DGGRG4 |
SN75LVDS83 应用技术支持与电子电路设计开发资源下载
- SN75LVDS83 数据资料 dataSheet 下载.PDF
- TI 德州仪器FlatLink选型与价格 . xls
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
- 使用 TI 的 SN75LVDS83 收发器改善 CAN 网络安全性 (zhct033.PDF, 299 KB)
- Isolated CAN Reference Design (PDF 48 KB)
- Isolated RS-485 Reference Design (PDF 80 KB)
- 无铅组件涂层的保存期评估 (PDF 1305 KB)
- Isolated CAN EVM User's Guide (PDF 1168 KB)
- Energy Harvesting: Solar Solutions Guide (PDF 409 KB)
- Analog Signal Chain Guide (8.62 MB)
- Industrial Interface IC Solutions (101 KB)
SN75LVDS83 工具与软件
| 培训内容 |
型号 |
软件/工具类型 |
| 通过 CAN 总线进行工业控制的演示平台 |
CANBUS-DEMO |
硬件参考设计 |
