SN75LVDS86 FlatLink(TM) 接收器
The SN75LVDS86 FlatLink receiver contains three serial-in 7-bit parallel-out shift registers, a 7× clock synthesizer, and four low-voltage differential signaling (LVDS) line receivers in a single integrated circuit. These functions allow receipt of synchronous data from a compatible transmitter, such as the SN75LVDS81, '83, '84, or '85, over four balanced-pair conductors and expansion to 21 bits of single-ended low-voltage TTL (LVTTL) synchronous data at a lower transfer rate.
When receiving, the high-speed LVDS data is received and loaded into registers at seven times the LVDS input clock (CLKIN) rate. The data is then unloaded to a 21-bit wide LVTTL parallel bus at the CLKIN rate. A phase-locked loop clock synthesizer circuit generates a 7× clock for internal clocking and an output clock for the expanded
|
SN75LVDS86 |
| Number of Parallel Inputs |
21 |
| Data Throughput(MB/s) |
163 |
| Serial Data Transmitter Channels |
3 |
| Type of Line Circuit |
LVDS |
| Driver (RL)(Ohms) |
100 |
| Supply Voltage(s)(V) |
3.3 |
| ICC(mA) |
8.7 |
| PLL Frequency(MHz) |
100 |
| Footprint |
31 - 68 |
| Operating Temperature Range(°C) |
DS90C562 |
| Pin/Package |
48TSSOP |
SN75LVDS86 特性
- 3:21 Data Channel Expansion at up to 178.5 Mbytes/s Throughput
- Suited for SVGA, XGA, or SXGA Display Data Transmission From Controller to Display With Very Low EMI
- Three Data Channels and Clock Low-Voltage Differential Channels In and 21 Data and Clock Low-Voltage TTL Channels Out
- Operates From a Single 3.3-V Supply and 250 mW (Typ)
- 5-V Tolerant SHTDN Input
- ESD Protection Exceeds 4 kV on Bus Pins
- Packaged in Thin Shrink Small-Outline Package (TSSOP) With 20-Mil Terminal Pitch
- Consumes Less Than 1 mW When Disabled
- Wide Phase-Lock Input Frequency Range 31 MHz to 68 MHz
- No External Components Required for PLL
- Open-Circuit Receiver Fail-Safe Design
- Inputs Meet or Exceed the Requirements of ANSI EIA/TIA-644 Standard
- Improved Replacement for the National™ DS90C562
SN75LVDS86 芯片订购指南
| 器件 |
状态 |
温度 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| SN75LVDS86DGG |
ACTIVE |
0 to 70 |
2.90 | 1ku |
TSSOP (DGG) | 48 |
40 | TUBE |
|
| SN75LVDS86DGGG4 |
ACTIVE |
0 to 70 |
2.90 | 1ku |
TSSOP (DGG) | 48 |
40 | TUBE |
|
| SN75LVDS86DGGR |
ACTIVE |
0 to 70 |
2.45 | 1ku |
TSSOP (DGG) | 48 |
2000 | LARGE T&R |
|
| SN75LVDS86DGGRG4 |
ACTIVE |
0 to 70 |
2.45 | 1ku |
TSSOP (DGG) | 48 |
2000 | LARGE T&R |
|
SN75LVDS86 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| SN75LVDS86DGG |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SN75LVDS86DGG |
SN75LVDS86DGG |
| SN75LVDS86DGGG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SN75LVDS86DGGG4 |
SN75LVDS86DGGG4 |
| SN75LVDS86DGGR |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SN75LVDS86DGGR |
SN75LVDS86DGGR |
| SN75LVDS86DGGRG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
SN75LVDS86DGGRG4 |
SN75LVDS86DGGRG4 |
SN75LVDS86 应用技术支持与电子电路设计开发资源下载
- SN75LVDS86 数据资料 dataSheet 下载.PDF
- TI 德州仪器FlatLink选型与价格 . xls
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
- 使用 TI 的 SN75LVDS86 收发器改善 CAN 网络安全性 (zhct033.PDF, 299 KB)
- Isolated CAN Reference Design (PDF 48 KB)
- Isolated RS-485 Reference Design (PDF 80 KB)
- 无铅组件涂层的保存期评估 (PDF 1305 KB)
- Isolated CAN EVM User's Guide (PDF 1168 KB)
- Energy Harvesting: Solar Solutions Guide (PDF 409 KB)
- Analog Signal Chain Guide (8.62 MB)
- Industrial Interface IC Solutions (101 KB)
SN75LVDS86 工具与软件
| 培训内容 |
型号 |
软件/工具类型 |
| 通过 CAN 总线进行工业控制的演示平台 |
CANBUS-DEMO |
硬件参考设计 |
