SN55LVDS31 四路 LVDS 发送器
The intended application of these devices and signaling technique is both point-to-point and multidrop (one driver and multiple receivers) data transmission over controlled impedance media of approximately 100
SN55LVDS31 SN65LVDM31 SN65LVDS047 SN65LVDS048A SN65LVDS31 SN65LVDS32 SN65LVDS33 SN65LVDS348 SN65LVDS352 SN65LVDS390 SN65LVDS391 SN75LVDS31
Input Signal
LVTTL
LVCMOS
LVTTL
LVDS
LVTTL
LVDS
CMOS, ECL, LVCMOS, LVDS, LVECL, LVPECL, PECL
CMOS, ECL, LVCMOS, LVDS, LVECL, LVPECL, PECL
CMOS, ECL, LVCMOS, LVDS, LVECL, LVPECL, PECL
LVDS
LVTTL
Output Signal
LVDS
LVDM
LVDS
LVTTL
LVDS
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVDS
LVTTL
No. of Rx
4
4
4
4
4
4
No. of Tx
4
4
4
4
4
4
4
Signaling Rate(Mbps)
400
150
400
400
400
100
400
340
560
630
630
155
Supply Voltage(s)(V)
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
ICC(Max)(mA)
35
40
26
15
35
18
23
20
20
18
26
35
Rx tpd(Typ)(ns)
2.9
2.3
4
4
4
2.6
Tx tpd(Typ)(ns)
1.7
2.3
1.8
1.7
1.7
Part-to-Part Skew(Max)(ps)
1000
1000
1000
800
1000
1000
1000
1000
1500
1000
Pin/Package
16CDIP, 16CFP, 20LCCC
16SOIC
16SOIC, 16TSSOP
16SOIC, 16TSSOP
16SO, 16SOIC, 16TSSOP
16SO, 16SOIC, 16TSSOP
16SOIC, 16TSSOP
16SOIC, 16TSSOP
24TSSOP
16SOIC, 16TSSOP
16SOIC, 16TSSOP
16SOIC, 16TSSOP
Operating Temperature Range(°C)
-55 to 125
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
0 to 70
ESD HBM(kV)
8
12
8
10
8
8
15
15
15
15
Approx. Price (US$)
1.50 | 1ku
1.85 | 1ku
1.30 | 1ku
1.30 | 1ku
1.30 | 1ku
1.20 | 1ku
1.65 | 1ku
2.90 | 1ku
1.20 | 1ku
1.20 | 1ku
1.30 | 1ku
SN55LVDS31 特性
Meet or Exceed the Requirements of ANSI TIA/EIA-644 Standard
Low-Voltage Differential Signaling With Typical Output Voltage of 350 mV and 100- Typical Output Voltage Rise and Fall Times of 500 ps (400 Mbps)
Typical Propagation Delay Times of 1.7 ns
Operate From a Single 3.3-V Supply
Power Dissipation 25 mW Typical Per Driver at 200 MHz
Driver at High Impedance When Disabled or With VCC = 0
Bus-Terminal ESD Protection Exceeds 8 kV
Low-Voltage TTL (LVTTL) Logic Input Levels
Pin Compatible With AM26LS31, MC3487, and µA9638
Cold Sparing for Space and High Reliability Applications Requiring Redundancy
SN55LVDS31 芯片订购指南
器件
状态
温度
价格
封装 | 引脚
封装数量 | 封装载体
丝印标记
SN55LVDS31W
ACTIVE
-55 to 125
16.83 | 100u
CFP (W) | 16 1 | TUBE
SNJ55LVDS31FK
ACTIVE
-55 to 125
22.55 | 100u
LCCC (FK) | 20 1 | TUBE
SNJ55LVDS31J
ACTIVE
-55 to 125
16.50 | 100u
CDIP (J) | 16 1 | TUBE
SNJ55LVDS31W
ACTIVE
-55 to 125
20.54 | 100u
CFP (W) | 16 1 | TUBE
SN55LVDS31 质量与无铅数据
器件
环保计划*
铅/焊球涂层
MSL 等级/回流焊峰
环保信息与无铅 (Pb-free)
DPPM / MTBF / FIT 率
SN55LVDS31W
TBD
A42
N/A for Pkg Type
SN55LVDS31W
SN55LVDS31W
SNJ55LVDS31FK
TBD
POST-PLATE
N/A for Pkg Type
SNJ55LVDS31FK
SNJ55LVDS31FK
SNJ55LVDS31J
TBD
A42
N/A for Pkg Type
SNJ55LVDS31J
SNJ55LVDS31J
SNJ55LVDS31W
TBD
A42
N/A for Pkg Type
SNJ55LVDS31W
SNJ55LVDS31W
SN55LVDS31 应用技术支持与电子电路设计开发资源下载
SN55LVDS31 数据资料 dataSheet 下载 .PDF TI 德州仪器LVDS PHYs选型与价格 . xls 所选封装材料的热学和电学性质 (PDF 645 KB)使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)接口选择指南 (Rev. D) (PDF 2994 KB)Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)Isolated RS-485 Reference Design (PDF 80 KB)无铅组件涂层的保存期评估 (PDF 1305 KB)Analog Signal Chain Guide (8.62 MB)Industrial Interface IC Solutions (101 KB)
The SN55LVDS31, SN65LVDS31, SN65LVDS3487, and SN65LVDS9638 are differential line drivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as TIA/EIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the four current-mode drivers will deliver a minimum differential output voltage magnitude of 247 mV into a 100-
load when enabled.
